zynq fpga data acquisition

overview

This build explores a Zynq-based data acquisition flow for simulated SiPM-style signals. The goal is fast, predictable capture in programmable logic with clean handoff to software for downstream analysis and control.

highlights

• • Implemented a PL-side acquisition and buffering path tuned for deterministic transfer.
• • Connected programmable logic and ARM processing over AXI interfaces.
• • Validated end-to-end movement from captured events to processor-readable data.

stack + tools